We believe that learning in computer science and engineering should reflect the current state of the field, as well as introduce the principles that are shaping computing. We also feel that readers in every specialty of computing need to appreciate the organizational paradigms that determine the capabilities, Performance, and, ultimately, the success of computer systems. Modern computer technology requires professionals of every computing specialty to understand both hardware and software. The interaction between hardware and software at a variety of levels also offers a framework for understanding the fundamentals of computing. Whether your Primary interest is computer science or electrical engineering, the central ideas in computer organization and design are the same. Thus, our emphasis in this book is to show the relationship between hardware and software and to focus on the concepts that are the basis for current computers.
Worked Examples
Computer Organization and Design Online
Preface
1 Computer Abstractions and Technology
1.1 Introduction
1.2 Below Your Program
1.3 Under the Covers
1.4 Integrated Circuits: Fueling Innovation
1.5 Real Stuff: Manufacturing Pentium Chips
1.6 Fallacies and Pitfalls
1.7 Concluding Remarks
1.8 Historical Perspective and Further Reading
1.9 Key Terms
1.10 Exercises
2 The Role of Performance
2.1 Introduction
2.2 Measuring Performance
2.3 Relating the Metrics
2.4 Choosing Programs to Evaluate Performance
2.5 Comparing and Summarizing Performance
2.6 Real Stuff: The SPEC95 Benchmarks and Performance of Recent Processors
2.7 Fallacies and Pitfalls
2.8 Concluding Remarks
2.9 Historical Perspective and Further Reading
2.10 Key Terms
2.11 Exercises
3 Instruction: Language of the Machine
3.1 Introduction
3.2 Operation of the Computer Hardware
3.3 Operands of the Computer Hardware
3.4 Representing Instructions in the Computer
3.5 Instructions for Making Decisions
3.6 Supporting Procedures in Computer Hardware
3.7 Beyond Numbers
3.8 Other Styles of MIPS Addressing
3.9 Starting a Program
3.10 An Example to Put It All Together
3.11 Arrays versus Pointers
3.12 Real Stuff: PowerPC and 80x86 Instructions
3.13 Fallacies and Pitfalls
3.14 Concluding Remarks
3.15 Historical Perspective and Further Reading
3.17 Exercises
4 Arithmetic for Computers
4.1 Introduction
4.2 Signed and Unsigned Numbers
4.3 Addition and Subtraction
4.4 Logical Operations
4.5 Constructing an Arithmetic Logic Unit
4.6 Multiplication
4.7 Division
4.8 Floating Point
4.9 Real Stuff: Floating Point In the PowerPC and 80x86
4.10 Fallacies and Pitfalls
4.11 Concluding Remarks
4.12 Historical Perspective and Further Reading
4.13 Key Terms
4.14 Exercises
5 The Processor: Datapath and Control
5.1 Introduction
5.2 Building a Datapath
5.3 A Simple Implementation Scheme
5.4 A Multicycle Implementation
5.5 Microprogramming: Simplifying Control Design
5.6 Exceptions
5.7 Real Stuff: The Pentium Pro Implementation
5.8 Fallacies and Pitfalls
5.9 Concluding Remarks
5.10 Historical Perspective and Further Reading
5.11 Key Terms
5.12 Exercises
6 Enhancing Performance with Pipelining
6.1 An Overview of Pipelining
6.2 A Pipelined Datapath
6.3 Pipelined Control
6.4 Data Hazards and Forwarding
6.5 Data hazards and Stalls
6.6 Branch Hazards
6.7 Exceptions
6.8 Superscalar and Dynamic Pipelining
6.9 Real Stuff: PowerPC 604 and Pentium Pro Pipelines
6.10 Fallacies and Pitfalls
6.11 Concluding Remarks
6.12 Historical Perspective and Further Reading
6.13 Key Terms
6.14 Exercises
7 Large and Fast: Exploiting Memory Hierarchy
7.1 Introduction
7.2 The Basics of Caches
7.3 Measuring and Improving Cache Performance
7.4 Virtual Memory
7.5 A Common Framework for Memory Hierarchies
7.6 Real Stuff: The Pentium Pro and PowerPC 604 Memory Hierarchies
7.7 Fallacies and Pitfalls
7.8 Concluding Remarks
7.9 Historical Perspective and Further Reading
7.10 Key Terms
7.11 Exercises
8 Interfacing Processors and Peripherals
8.1 Introduction
8.2 I/O Performance Measures: Some Examples from Disk and file Systems
8.3 Types and Characteristics of I/O Devices
8.4 Buses: Connecting I/O Devices to Processor and Memory
8.5 Interfacing I/O Devices to the Memory, Processor, and Operating System
8.6 Designing an I/O System
8.7 Real Stuff: A Typical Desktop I/O System
8.8 Fallacies and Pitfalls
8.9 Concluding Remarks
8.10 Historical Perspective and Further Reading
8.11 Key Terms
8.12 Exercises
9 Multiprocessors
9.1 Introduction
9.2 Programming Multiprocessors
9.3 Multiprocessors Connected by a Single Bus
9.4 Multiprocessors Connected by a Network
9.5 Clusters
9.6 Network Topologies
9.7 Real Stuff: Future Directions for Multiprocessors
9.8 Fallacies and Pitfalls
9.9 ConcludingRemarks-EvolutionversusRevolutionInComputerArchitecture
9.10 Historical Perspective and Further Reading
9.11 Key Terms
9.12 Exercises
APPENDICES
A Assemblers, Linkers, and the SPIM Simulator
A.1 Introduction
A.2 Assemblers
A.3 Linkers
A.4 Loading
A.5 Memory Usage
A.6 Procedure Call Convention
A.7 Exceptions and Interrupts
A.8 Input and Output
A.9 SPIM
A.10 MIPSR 2000 Assembly Language
A.11 Concluding Remarks
A.12 Key Terms
A.13 Exercises
B The Basics of Logic Design
B.1 Introduction
B.2 Gates, Truth Tables, and Logic Equation
B.3 Combinational Logic
B.4 Clocks
B.5 Memory Elements
B.6 Finite State Machines
B.7 Timing Methodologies
B.8 Concluding Remarks
B.9 Key Terms
B.10 Exercises
C mapping Control to Hardware
C.1 Introduction
C.2 Implementing Combinational Control Units
C.3 Implementing Finite State Machine Control
C.4 Implementing the Next-State Function with a Sequencer
C.5 Translating a Microprogram to Hardware
C.6 Concluding Remarks
C.7 Key Terms
C.8 Exercises
Glossary
Index
About This Book
We believe that learning in computer science and engineering should reflect the current state of the field, as well as introduce the principles that are shaping computing. We also feel that readers in every specialty of computing need to appreciate the organizational paradigms that determine the capabilities, performance, and, ultimately, the success of computer systems.
Modern computer technology requires professionals of every computing specialty to understand both hardware and software. The interaction between hardware and software at a variety of levels also offers a framework for under standing the fundamentals of computing. Whether your primary interest is computer science or electrical engineering, the central ideas in computer organization and design are the same. Thus, our emphasis in this book is to show the relationship between hardware and software and to focus on the concepts that are the basis for current computers.
Traditionally, the competing influences of assembly language, organization, and design have encouraged books that consider each area as a distinct subset. In our view, such distinctions have increasingly lost meaning as computer technology has advanced. To truly understand the breadth of our field, it is important to understand the interdependencies among these topics.
The audience for this book includes those with little experience in assembly language or logic design who need to understand basic computer organization as well as readers with backgrounds in assembly language and/or logic design who want to learn how to design a computer or understand how a system works and why it performs as it does.
Changes for the Second Edition
We had six major goals for the second edition: tie the ideas from the book more closely to the real world; enhance how well the book works for beginners; extend the book material using the World Wide Web; improve quality; improve pedagogy; and finally, update the technical content to reflect changes in the industry since the publication of the first edition in 1994---the conventional reason for a new edition.
First, to make the examples in the book even more concrete and connected with the real world, in each chapter we explained how the ideas were realized in the latest microprocessors from Intel or from IBM/Motorola. Hence you can learn how the mechanisms discussed are used in the computer on your desktop. Each chapter has a new section called "Real Stuff" that ties the ideas you read about to the machine you probably use everyday.
Second, we wanted the book to work better for readers interested in an overview of computer organization. Each chapter now has a list of the key terms discussed in the chapter, and we added a glossary of more than 300 definitions. We also rely on analogies from everyday life to explain subtleties of computers:
commercial airplanes to show how performance differs if measured as bandwidth or latency
the stealth of spies to explain procedure invocation and nesting
plumbing to show how carry-lookahead logic works
the laundry room to explain pipeline execution and hazards
a desk in a library to demonstrate principles of memory hierarchy
the management overhead as committees .grow to illustrate the difficulty of achieving high performance in large-scale multiprocessors
More specifically, we added more assembly language programming examples and more explanation in each example to help the beginner understand assembly language programming in Chapters 3 and 4. We also added an introductory section to the pipelining chapter (Chapter 6) that allows understanding of the important ideas and issues in pipeline design without having to delve into the details of a pipelined datapath and control.
Our third goal was to go beyond the limitations of a printed book by adding descriptions and links on the World Wide Web. Throughout this book, you will often see the "Web Enhanced" icon shown at the left. Wherever this icon appears, you can go to http://urww.mkp.com/cod2e.htm to find materials related to the text.
The WWW lets us give examples of recent, relevant machines so that you can see the latest versions of the ideas in the book. For example, we've added a new online appendix (Web Extension I) comparing RISC architectures. Other examples include links for specific references in the book to other sites; instructions on how to use PCspim, the new DOS and Windows versions of the SPIM simulator, as well as links to all the versions of SPIM; access to all the figures from the book; lecture slides; links to instructors' home pages; and an online Instructors Manual. We also included some appendices from the first edition (Web Extensions II and III) that you may find valuable. We intend to update these pages periodically to make new and better links.
Fourth, we wanted to significantly reduce the flaws that creep into a book during the revision process. The first edition of the book used beta testing to see which ideas worked well and which did not, and we were very happy with the improvements as a result. We did the same with the second edition. To further reduce the chances of bugs in the book, we gave ourselves a longer, development cycle and involved many more computer architects in its preparation. First, Tod Amon completely revised all exercises, in part based on suggestions of exercises by a dozen instructors. The book now has 30% new exercises and another 30% that have been reworked for a total of 400. We believe that they are much more clearly worded than before and that there is sufficient variety for a broader group of students. Second, Kent Wilken carefully read the beta edition, suggesting hundreds of improvements. After we revised the beta edition, George Adams gave another very careful read of our revision, again making hundreds of useful suggestions. Finally, we reviewed the copyedit and read the page proof to try to catch mistakes that can creep in during the book production process. Although we are sure there must still be bugs for which you can get rewards, we believe this edition is far cleaner than the first.
The fifth goal was to improve the exposition of the ideas in the book, based on difficulties mentioned by readers of the first edition. We expanded the section of Chapter 3 explaining procedures, showing the procedure infrastructure in a longer sequence of examples. Chapter 4 has a longer description of carry lookahead and carry save adders. We simplified the explanation of the multicycle datapath in Chapter 5 by adding several registers. Chapter 6 actually got a good deal shorter by adding an overview section, since it allowed us to reduce the number of examples in the detailed pipelining sections. We also made numerous changes in the pipeline diagrams to make them easier to understand and more consistent. Chapter 7 was reorganized to put all caches together before moving to virtual memory and then translation buffers, coming back to the commonalities at the end. We also changed the emphasis from virtual memory as simply another level of the hierarchy to the hardware enforcer of protection. Chapter 8 was refocused to be more quantitative and design oriented. Chapter 9 was completely rewritten and retitled, reflecting the dramatic change in the parallel processing industry since 1994.
Finally, in the interval since the first edition of this book, a computer has run a program at the rate of 1 teraFLOPS--a trillion floating-point operations per second or a million floating-point operations per microsecond, another computer has played better chess than the best human being, and the whole world is more closely connected thanks to the World Wide Web. These events occurred in part because computer designers have first improved performance of a single computer by a factor of 100 in the last 10 years and then harnessed together many of them to achieve even greater performance. We have included descriptions of new ideas that helped make these miracles occur, such as branch prediction and out-of-order execution in Chapter 6, multilevel and nonblocking caches in Chapter 7, switched networks and new buses in Chapter 8, and nonuniform-memory-access, shared-memory multiprocessors and clusters in Chapter 9.
Supplements and Web Extensions
A directory of the Web supplements, extensions, and resources appears on page xvi. In it you'll find a complete electronic supplements package, as well as a variety of materials and resources designed to support this text, that you can access on the publisher's World Wide Web site at www.mkp.com/cod2e.htm. Included in the supplements package is an online Instructors Manual. The Instructors Manual contents are available from the Web site with the exception of the solutions. Instructors should contact the publisher directly to obtain access to solutions.
If they prefer, instructors may choose a printed Instructors Manual that includes chapter objectives, teaching hints, and critical points for each chapter as well as solutions to the exercises. Instructors should contact the publisher directly to obtain the printed Instructors Manual.
Relationship to CA:AQA
Some readers may be familiar with Computer Architecture: A Quantitative Approach. Our motivation in writing that book was to describe the principles of computer architecture using solid engineering fundamentals and quantitative cost/performance trade-offs. We used an approach that combined examples and measurements, based on commercial systems, to create realistic design experiences. Our goal was to demonstrate that computer architecture could be learned using scientific methodologies instead of a descriptive approach.
A majority of the readers for Computer Organization and Design: The Hardware/Software Interface do not plan to become computer architects. The performance of future software systems will be dramatically affected, however, by how well software designers understand the basic hardware techniques at work in a system. Thus, compiler writers, operating system designers, data base programmers, and most other software engineers need a firm grounding in the principles presented in this book. Similarly, hardware designers must understand clearly the effects of their work on software applications.
Thus, we knew that this book had to be much more than a subset of the material in Computer Architecture. We've approached every topic in a new way. Topics shared between the books were written anew for this effort, while many other topics are presented here for the first time. To further ensure the uniqueness of Computer Organization and Design, we exchanged the writing responsibilities we assigned to ourselves for Computer Architecture. The topics that Hennessy covered in the first book were written by Patterson in this one, and vice versa. Several of our reviewers suggested that we call this book "Computer Organization: A Conceptual Approach" to emphasize the significant differences from our other book. It is our hope that the reader will find
new insights in every section, as well as a more tractable introduction to the abstractions and principles at work in a modern computer.
We were so happy with Computer Organization and Design that the second edition of Computer Architecture was revised to remove most of the introductory material, hence there is much less overlap today than with the first editions of both books.
Learning by Evolution
It is tempting for authors to present the latest version of a hardware concept and spend considerable time explaining how these often sophisticated ideas work. We decided instead to present each idea from its first principles, emphasizing the simplest version of an idea, how it works, and how it came to be. We believe that presenting the fundamental concepts first offers greater insight into why machines look the way they do today, as well as how they might evolve as technology changes.
To facilitate this approach, we have based the book upon the MIPS processor. It offers an easy-to-understand instruction set and can be implemented in a simple, straightforward manner. This allows readers to grasp an entire machine organization and to follow exactly how the machine implements its instructions. Throughout the text, we present the concepts before the details, building from simpler versions of ideas to more complex ones. Examples of this approach can be found in almost every chapter. Chapter 3 builds up to MIPS assembly language starting with one simple instruction type. The concepts and algorithms used in modern computer arithmetic are built up starting from the familiar grade school algorithms in Chapter 4. Chapters 5 and 6 start from the simplest possible implementation of a MIPS subset and build to a fully pipelined version. Chapter 7 illustrates the abstractions and concepts in memory hierarchies by starting with the simplest possible cache, then extending it, and then covering virtual memory and TLBs using the same ideas.
This evolutionary process is used extensively in Chapters 5 and 6, where the complete datapath and control for a processor are presented. Since learning is a visual process, we have included sequences of figures that contain progressively more detail or show a sequence of events within the machine. We have also used a second color to help readers follow the figures and sequences of figures.
Learning from this Book
Our objective of demonstrating first principles through the interrelationship of hardware and software is enhanced by several features found in each chapter. The Hardware/Software Interface sections are used to highlight these relationships. We've also included Big Picture sections for each chapter to remind readers of the major insights. And as mentioned above, each chapter has a Real Stuff section to tie concepts to mechanisms found in current desktop computers. We hope that these elements reinforce our goal of making this book equally valuable as a foundation for further study in both hardware and software courses.
To illustrate the relationship between high-level language and machine language and to describe the hardware algorithms, we have chosen C. It is widely used in compiler and operating system courses, it is widely used by computer professionals, and several facilities in the language make it suitable for describing hardware algorithms. For those who are familiar with Pascal rather than C, Web Extension II, found at wuno.mkp.com/cod2e.htm provides a quick introduction to C for Pascal programmers and should be sufficient to understand the code sequences in the text.
We have tried to manage the pace of the presentation for readers of varying experience. Ideas that are not essential to a newcomer, but which may be of interest to the more advanced reader, are set off from the main text and presented as elaborations. When appropriate, advanced concepts have been saved for the exercise sets and enhanced with additional discussion as In More Depth sections. In addition, we found that the extent of background that students have in logic design varies widely. Thus, Appendix B provides all the necessary background for those readers not versed in the basics of logic design, as well as some slightly more sophisticated material for the more advanced student. Within a course, this material can be used in supplementary lectures or incorporated into the mainstream of the course, depending on the background of the students and the goals of the instructor.
We have also found that readers enjoy learning the history of the field, so the Historical Perspective sections include many photographs of important machines and little known stories about the ideas behind them. We hope that the perspective offered by these anecdotes and photographs will add a new dimension for our readers.
Course Syllabi and this Book
One particularly difficult issue facing instructors is the balance of assembly language programming with computer organization. We have Written this book so that readers will learn more about organization and design, while still providing a complete introduction to assembly language. By using a RISC architecture, students can learn the basics of an instruction set and assembly language programming in less time than is typically reserved in the curriculum for CISC-based assembly courses. Many instructors have also found that using a simulator, rather than running in native mode on a real machine, pro- vides the experience of assembly language programming in substantially less time (and with less pain for the student).
SPIM is the simulator of the MIPS processor developed by James R. Lams. The publisher's Web site at www.mkp.com/cod2e.htm has links to spire and xspim, which were developed by Larus to run on UNIX, and to PCspim (DOS) and PCspim (Windows), which were adapted from the Unix versions by David Carley. Although not identical to the Unix versions, the DOS and Windows versions offer the same general functionality. PCspim (Windows) will run under Windows 3.1, Windows 95, and Windows NT. We feel this will enhance student opportunities for learning about computer organization (see Appendix A). Finally, stepwise derivation of assembly from a high-level language takes less study time than learning it from the ground up. Chapter 3 and Appendix A may be used together or separately, depending upon the reader's background. Chapter 3 provides the basics and can be supplemented with additional detail from Appendix A for a complete introduction to modem assembly language programming. In the end, we hope this approach offers a more efficient treatment of assembly for most readers, while being sufficiently broad to support detailed lecture or laboratory coverage if an instructor wants more emphasis on assembly language programming.
For those courses intended to expose students to the important principles of computer organization, the chapters from 4 to 9 explain the key ideas. Chapter 4 explains the idea of number representation for both integers and floating-point numbers and shows how arithmetic algorithms work. Chapters 5 and 6 introduce key ideas in control and pipelining and can be covered at several levels. Chapter 7 introduces the principles of memory hierarchies, unifying the ideas of caching and virtual memory. Chapter 8 shows how I/O systems are organized and controlled, explaining the cooperative relationship between the hardware and the operating system. Finally, Chapter 9 uses examples to introduce the key principles used in multiprocessors.
For readers who want a greater emphasis on computer design, Chapters 4 through 8, together with Appendices B and C, provide that opportunity. For example, Chapter 4 explains a number of techniques used by computer designers to speed up addition and multiplication. Chapters 5 and 6 derive complete implementations of a MIPS subset using the arithmetic elements from Chapter 4 and a number of common datapath elements (such as register files and memories) that are explained in detail in Appendix B. Chapter 5 starts with a very simple implementation; a complete datapath and control unit are constructed for this organization. The implementation is then modified to derive a faster version where each instruction can take differing numbers of clock cycles. The control for this multicycle implementation is designed using two different methods in Chapter 5. Appendix C shows in detail how the control specifications are implemented using structured logic blocks. Chapter 6 builds on the single-clock cycle implementation created in Chapter 5 to show how pipelined machines are designed. The design is extended to show how hazards can be handled and how control for interrupts works. The student interested in computer design is not only exposed to three different designs for the same instruction set, but can also see how these designs compare in terms of advantages and disadvantages.
Chapter Organization and Overview
Using these plans as the core, we developed the other chapters to introduce and support that core.
Many students remarked that they appreciated learning about the continuing rapid change in speed and capacity of hardware, as well as some of the history of computer development. This material is the focus of Chapter 1. It provides a perspective on how software or hardware will need to scale during the coming decades. Chapter 1 also introduces topics to be covered in later chapters.
Chapter 2 shows that time is the only safe measure of computer performance. It also relates common measurements used by hardware and software designers to the reliable measurement of time. The material in this chapter motivates the techniques discussed in Chapters 5, 6, and 7 and provides a framework for evaluating them.
Chapter 3 builds on the knowledge of a programming language to derive an assembly language, offering several rules of thumb that guide the designer of the assembly language. We chose the instruction set of a real computer, in this case MIPS, so that real compilers could be used by students to see the code that would be generated. We hide the delayed branch and load until Chapter 6 for pedagogical reasons. Fortunately, the MIPS assembler schedules both delayed branches and loads so the assembly language programmer can ignore these complexities without danger. Readers can see a very different approach to instruction set design in the Intel 80x86, which is covered in this chapter as well.
Although there is no consensus on what should be covered or what should be skipped in learning about computer arithmetic, we couldn't write Chapter 4 without reaching some conclusions of our own! Our solution is to introduce all the central ideas in the chapter and to provide some additional background for more advanced topics in the exercises. This allows one instructor to cover more advanced topics and assign exercises based on them, while another instructor may skip the material.
Chapters 5 and 6 show a realistic example of a processor in detail. Most readers appreciate having a real example to study, and a complete example provides the insight needed to see how all the pieces of a processor fit together for a pipelined and nonpipelined machine. To facilitate skipping some details. on hardware implementation of control, we have included much of this material in Appendix C.
Just as Chapters 2 through 6 provide important background for readers with an interest in compilers, Chapters 7 and 8 provide vital background to anyone pursuing further work in operating systems or databases. Chapter 7 describes the principles of memory hierarchies, focusing on the commonality between virtual memory and caching. Chapter 7 also emphasizes the role of the operating system and its interaction with the memory system.
Topics as diverse as operating systems, databases, graphics, and networking require an understanding of I/O systems organization as well as the major technical characteristics of devices that influence this organization. Chapter 8 focuses on the topic of how I/O systems are organized starting with bus organizations, working up to communication between the processor and I/O device, and finally to the management role of the operating system. While we emphasize the interfacing issues, especially between hardware and software, several other important topics are introduced. Many of these topics are useful not only in computer organization but as background in other areas. For example, the handshaking protocol, used to interface asynchronous I/O devices, has applications in any distributed system.
For some readers, this book may be their only overview of computer systems, so we have included a survey of multiprocessing. Rather than the traditional catalog of characteristics for many parallel machines, we have tried to describe the underlying principles that will drive the designs of parallel processors for the next decade. This section includes a small running example to show different versions of the same program for different parallel architectures. And as mentioned above, we have linked many example multiprocessors from the real world on the book's WWW page at www.mkp.com/cod2e.htm.
Because the book is intended as an introduction for readers with a variety of interests, we tried to keep the presentation flexible. The appendices on assembly language and logic design are one of the principle vehicles to allow such flexibility, as these are easily skipped by more advanced readers. The presence of the appendices has made it possible to use this book in a course that mixes EE and CS majors with fairly different backgrounds in logic design and software.
Assembly language programming is best learned by doing and in many cases will be done with the use of the simulator available with this book. Because of this, we invited Jim Larus, the creator of the SPIM simulator, to join us as contributor of Appendix A. Appendix A describes the SPIM simulator and provides further details of the MIPS assembly language. In addition, it describes assemblers and linkers, which handle the translation of assembly language programs to executable machine language.
The logic design appendix is intended as a supplement to the material on computer organization rather than a comprehensive introduction to logic design. While many EE students in a computer organization course will have already had a course on logic design or digital electronics, we have found that CS majors in many institutions have not had much exposure to this area. The first few sections of Appendix B provide the necessary background. We include some material, such as the organization of memories and finite state machine control of a processor, in the mainstream material, since it is crucial to understanding computer organization.
Selection of Material
If you had no prior background and wanted to read from cover-to-cover, the following order makes sense: Chapters 1 and 2, Web Extension III (if needed), Chapter 3, Chapter 4, Appendix A and Web Extension II (if interested), Appendix B, Chapter 5, Appendix C, Chapters 6, 7, 8, and 9. Clearly, most readers skip material. We have worked to provide readers with flexibility in their approach to the material, without making the discussions redundant. The chapters have been written as self-contained units with cross-references to other chapters when related text or figures should be considered. The book has been used successfully in a variety of courses with different goals and student backgrounds.
Concluding Remarks
In Computer Architecture we alternated the gender of a pronoun chapter by chapter. In this book we believe we have removed all such pronouns, except of course for specific people.
If you read the following acknowledgments section, you will see that we went to great lengths to correct mistakes. Since a book goes through many printings, we have the opportunity to make even more corrections. If you uncover any remaining, resilient bugs, please contact the publisher by electronic mail at cod2bugs@mkp.com or by low-tech mail using the address found on the copyright page. The first person to report a technical error will be awarded a $1.00 bounty upon its implementation in future printings of the book!
Finally, like the last book, there is no strict ordering of the authors' names. About half the time you will see Hennessy and Patterson, both in this book and in advertisements, and half the time you will see Patterson and Hennessy. You'll even find it listed both ways in bibliographic publications such as Books in Print. This again reflects the true collaborative nature of this book: Together we brainstormed about the ideas and method of presentation, then individually wrote about one-half of the chapters and acted as reviewer for every draft of the other. The page count suggests we again wrote almost exactly the same number of pages. Thus, we equally share the blame for what you are about to read.
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